1. Field of the Invention
This invention relates to a process for depositing a doped layer of polysilicon over a stepped surface of a semiconductor wafer. More particularly, this invention relates to a process wherein polysilicon can be deposited over a stepped surface of a semi-conductor wafer in a manner which will provide a doped polysilicon layer having the deposition profile of an undoped polysilicon.
2. Description of the Related Art
In the construction of integrated circuit structures on semiconductor wafers, trenches may be formed in the wafer, or raised lines (steps) may be formed over the surface of the wafer, either of which, for example, can result in an uneven or stepped surface on the wafer with low areas corresponding to the location of such trenches or regions between raised lines. It is sometimes desirable to form a doped layer of polysilicon over such a stepped surface, for example, to form a conductive line over or between oxide-covered steps, or to fill an oxide-coated trench with a conductor to form a capacitor.
It is usually desirable to completely fill up such low areas between raised portions on the wafer, when depositing a layer such as polysilicon thereon. Unfortunately, this is difficult to accomplish with a doped polysilicon since doped polysilicon tends to deposit faster on horizontal surfaces than on vertical surfaces. The result has been the formation of a thick layer of doped polysilicon over the raised portions of the integrated circuit structure, e.g., on top of the steps or on the horizontal wafer surfaces adjoining a trench, while the low areas remain partially unfilled.
This s shown in FIG. 1, which illustrates such a prior art deposition of doped polysilicon over a stepped surface of a semiconductor wafer. As shown therein, the doped polysilicon 16 horizontally deposited on the top surface 12 of oxide layer 6 formed over step 10 on wafer 2 is thicker than the doped polysilicon 18 deposited vertically on the sidewall surfaces 14 of oxide layer 6 on step 10. Polysilicon 16' formed over the oxide-coated horizontal bottom surface of trench 20 in wafer 2 is similarly deposited thicker than the vertically deposited polysilicon 18' on the sidewalls of trench 20 in the prior art structure of FIG. 1.
The result of such uneven deposition of doped polysilicon is that if the low region is to be completely filled, the entire structure must either be deposited to a greater thickness, with high portions of the resulting polysilicon layer then removed in a separate step.
It would, therefore, be desirable to provide a process wherein a layer of doped polysilicon could be deposited which would completely fill low segments between raised portions on a semiconductor wafer, i.e., would have the deposition characteristics and resulting profile of an undoped polysilicon layer.